Martin Storsjö
93a77a441a
The previously existing patch needed some modifications to fit on top of lld 3.9. Patch 2 makes sure that one still can use the lld built in this way for linking in MSVC mode. Patch 3 fixes linking binaries larger than 4 MB or so (previously the binaries linked fine but didn't work). Patch 4 makes sure to error out if the relocations are too far away (instead of producing a broken binary), which happens after 16 MB. Patch 5 fixes relocations that have an offset, which probably happens in hand-written assembly (in libav).
83 lines
3.2 KiB
Diff
83 lines
3.2 KiB
Diff
From 2f3ad0343836886143c1f8ac83552c6734e05205 Mon Sep 17 00:00:00 2001
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From: Saleem Abdulrasool <compnerd@compnerd.org>
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Date: Fri, 5 Aug 2016 17:28:21 +0000
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Subject: [PATCH 3/5] COFF ARM: Clear the J1 and J2 bits when applying
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relocations to 24 bit branches
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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The opcode for the bl branches can initially be F000 F800, i.e.
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the J1 and J2 bits are already set. Therefore mask these bits out
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before or'ing in the new bits.
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Patch by Martin Storsjö!
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Cherry-picked from SVN trunk commit 277836, git mirror commit
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7b7d94e63a.
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---
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COFF/Chunks.cpp | 3 ++-
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test/COFF/reloc-arm.test | 13 +++++++++++--
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2 files changed, 13 insertions(+), 3 deletions(-)
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diff --git a/COFF/Chunks.cpp b/COFF/Chunks.cpp
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index 1c1b181..2e6f535 100644
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--- a/COFF/Chunks.cpp
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+++ b/COFF/Chunks.cpp
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@@ -103,7 +103,8 @@ static void applyBranch24T(uint8_t *Off, int32_t V) {
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uint32_t J1 = ((~V >> 23) & 1) ^ S;
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uint32_t J2 = ((~V >> 22) & 1) ^ S;
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or16(Off, (S << 10) | ((V >> 12) & 0x3ff));
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- or16(Off + 2, (J1 << 13) | (J2 << 11) | ((V >> 1) & 0x7ff));
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+ // Clear out the J1 and J2 bits which may be set.
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+ write16le(Off + 2, (read16le(Off + 2) & 0xd000) | (J1 << 13) | (J2 << 11) | ((V >> 1) & 0x7ff));
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}
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void SectionChunk::applyRelARM(uint8_t *Off, uint16_t Type, Defined *Sym,
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diff --git a/test/COFF/reloc-arm.test b/test/COFF/reloc-arm.test
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index 11b863d..f7656e7 100644
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--- a/test/COFF/reloc-arm.test
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+++ b/test/COFF/reloc-arm.test
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@@ -9,7 +9,7 @@
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# CHECK: 402030 fe07e62f 00000000 00000000 00000000
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# CHECK: 402040 3e04de2f 00000000 00000000 00000000
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# CHECK: 402050 fe07d62f 00000000 00000000 00000000
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-# CHECK: 402060 00000000 00000000 00000000 00000000
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+# CHECK: 402060 fef0cef7 00000000 00000000 00000000
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--- !COFF
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header:
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@@ -23,7 +23,7 @@ sections:
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- Name: .text
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Characteristics: [ IMAGE_SCN_CNT_CODE, IMAGE_SCN_MEM_PURGEABLE, IMAGE_SCN_MEM_16BIT, IMAGE_SCN_MEM_EXECUTE, IMAGE_SCN_MEM_READ ]
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Alignment: 4096
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- SectionData: 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000
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+ SectionData: 00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000f000f8000000000000000000000000
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Relocations:
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- VirtualAddress: 0
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SymbolName: foo
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@@ -43,6 +43,9 @@ sections:
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- VirtualAddress: 80
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SymbolName: foo
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Type: 21 # IMAGE_REL_AMD64_BLX23T
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+ - VirtualAddress: 96
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+ SymbolName: bar
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+ Type: 20 # IMAGE_REL_ARM_BRANCH24T
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symbols:
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- Name: .aaa
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Value: 0
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@@ -68,4 +71,10 @@ symbols:
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SimpleType: IMAGE_SYM_TYPE_NULL
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ComplexType: IMAGE_SYM_DTYPE_NULL
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StorageClass: IMAGE_SYM_CLASS_EXTERNAL
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+ - Name: bar
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+ Value: 0x500000
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+ SectionNumber: 1
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+ SimpleType: IMAGE_SYM_TYPE_NULL
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+ ComplexType: IMAGE_SYM_DTYPE_NULL
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+ StorageClass: IMAGE_SYM_CLASS_EXTERNAL
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...
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--
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2.7.4
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