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.TH CTQ 1 "November 2026" "convert_to_quant" "User Commands"
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.SH NAME
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ctq \- convert safetensors model weights to scaled FP8, NVFP4, INT8, and MXFP8 formats
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.SH SYNOPSIS
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.B ctq
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\fB\-i\fR \fIINPUT\fR
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[\fB\-o\fR \fIOUTPUT\fR]
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[\fB\-\-comfy_quant\fR]
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[\fB\-\-simple\fR]
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[\fB\-\-device\fR \fIDEVICE\fR]
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[\fB\-\-low\-memory\fR]
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[\fB\-\-nvfp4\fR|\fB\-\-int8\fR|\fB\-\-mxfp8\fR]
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[\fIoptions...\fR]
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.SH DESCRIPTION
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.B ctq
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(\fBconvert_to_quant\fR) quantizes neural network weights stored in \fI.safetensors\fR
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format into scaled lower-precision representations, primarily targeting
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\fBComfyUI\fR and hardware-accelerated inference runtimes.
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.PP
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By default, \fBctq\fR performs Scaled FP8 quantization using SVD-guided learned rounding
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(Prodigy optimizer) and per-tensor scaling. It supports multiple quantization formats:
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.IP \(bu 2
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\fBFP8\fR (Float8 E4M3 / E5M2) with tensor-wise, row-wise, or block-wise scaling.
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.IP \(bu 2
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\fBNVFP4\fR (NVIDIA 4-bit floating point, E2M1 with dual-level block scaling).
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.IP \(bu 2
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\fBINT8\fR block-wise quantization with optional group-wise Hadamard rotation (\fIConvRot\fR).
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.IP \(bu 2
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\fBMXFP8\fR (Microscaling FP8) and Hybrid MXFP8 formats.
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.PP
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Quantization error can optionally be extracted into a companion Error Correction LoRA
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adapter (\fB\-\-extract\-lora\fR) to restore high-precision fidelity.
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.SH OPTIONS
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.SS Standard Options
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.TP
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.BI \-i " " INPUT ", " \-\-input " " INPUT
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Path to the input \fI.safetensors\fR weight file (required).
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.TP
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.BI \-o " " OUTPUT ", " \-\-output " " OUTPUT
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Path to the output \fI.safetensors\fR destination file. Auto-generated if omitted.
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.TP
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.BR \-\-comfy_quant ", " \-\-comfy\-quant
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Write ComfyUI-compatible quantization tensors and metadata (\fI.comfy_quant\fR).
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.TP
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.B \-\-simple
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Skip SVD learned rounding and apply fast, direct grid quantization.
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.TP
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.BR \-fpmm ", " \-\-full_precision_matrix_mult
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Add \fIfull_precision_matrix_mult=True\fR to \fI.comfy_quant\fR metadata.
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.TP
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.B \-\-heur
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Skip layers with poor quantization characteristics (aspect ratio, size).
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.TP
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.BI \-\-device " " DEVICE
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Execution device (e.g. \fBcuda\fR, \fBcuda:0\fR, \fBcpu\fR). Overrides auto-detection.
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.TP
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.BR \-lm ", " \-\-low\-memory
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Stream tensor loading to minimize RAM consumption (recommended for models exceeding 50% available memory).
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.TP
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.BI \-\-verbose " " {DEBUG,VERBOSE,NORMAL,MINIMAL}
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Logging verbosity level (default: \fBNORMAL\fR).
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.TP
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.BI \-\-manual_seed " " SEED
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Random seed for reproducibility. Set to \-1 for non-deterministic execution.
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.TP
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.B \-\-save\-quant\-metadata
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Write quantization metadata directly into safetensors file header (\fI_quantization_metadata\fR).
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.SS Quantization Formats & Modes
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.TP
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.B \-\-nvfp4
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Quantize to NVIDIA FP4 (E2M1) with dual-level block scaling (Blackwell architecture).
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.TP
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.B \-\-int8
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Quantize to INT8 block-wise format instead of FP8.
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.TP
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.B \-\-convrot
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Enable group-wise Hadamard rotation (ConvRot) for INT8 row-wise quantization to mitigate activation outliers.
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.TP
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.BI \-\-convrot\-group\-size " " SIZE
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Group size for ConvRot (must be a power of 4, e.g. 64, 256, 1024; default: 256).
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.TP
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.B \-\-mxfp8
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Quantize to MXFP8 (Microscaling FP8) format.
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.TP
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.BI \-\-scaling_mode " " {tensor,row,block}
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FP8 scaling granularity: \fBtensor\fR (single scale), \fBrow\fR (per-row), or \fBblock\fR (2D tile). Default: \fBtensor\fR.
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.TP
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.BI \-\-block_size " " SIZE
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Block size for block-wise scaling (default: 128).
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.SS Learned Rounding & Optimization
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.TP
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.BI \-\-optimizer " " {prodigy,adamw,radam,original}
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Optimization algorithm for learned rounding (default: \fBprodigy\fR).
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.TP
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.BI \-\-num_iter " " N
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Optimization iterations per tensor (default: 4000).
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.TP
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.BI \-\-lr " " LR
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Initial learning rate for AdamW/RAdam/Original (default: 1.0).
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.TP
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.BI \-\-lr_schedule " " {plateau,exponential,adaptive}
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Learning rate decay schedule (default: \fBplateau\fR).
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.TP
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.B \-\-use_speed
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Enable Prodigy's \fIuse_speed\fR acceleration parameter.
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.TP
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.BI \-\-top_p " " P
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Cumulative energy proportion of principal components for SVD (default: 0.2).
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.TP
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.BI \-\-min_k " " K ", " \-\-max_k " " K
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Minimum and maximum SVD rank bounds (default: 256 and 1280).
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.TP
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.B \-\-full_matrix
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Compute full SVD instead of low-rank SVD.
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.TP
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.BI \-\-scale\-optimization " " {fixed,iterative,joint,dualround}
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Block scale tuning strategy (default: \fBfixed\fR).
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.SS Error Correction LoRA
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.TP
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.B \-\-extract\-lora
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Extract quantization residual error into a separate LoRA adapter file.
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.TP
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.BI \-\-lora\-rank " " RANK
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Rank for extracted LoRA layers (default: 32).
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.TP
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.BI \-\-lora\-target " " REGEX
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Regex matching layers to target for LoRA extraction.
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.TP
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.BI \-\-lora\-output " " PATH
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Output file path for the extracted LoRA adapter (\fI.safetensors\fR).
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.SS Model Filters
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.B ctq
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includes pre-tuned layer exclusion filters for common architecture families:
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.TP
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.BR \-\-gemma4 ", " \-\-qwen_vlm ", " \-\-t5xxl ", " \-\-wan ", " \-\-hunyuan ", " \-\-ltxv2 ", " \-\-qwen ", " \-\-zimage
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Keep architecture-critical layers (embeddings, layernorms, vision towers, cross-attention) in native precision.
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.SH EXAMPLES
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.TP
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.B Standard FP8 quantization for ComfyUI:
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.RS
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.nf
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ctq -i model.safetensors -o model-fp8.safetensors --comfy_quant
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.fi
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.RE
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.TP
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.B NVFP4 quantization using learned rounding:
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.RS
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.nf
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ctq -i model.safetensors -o model-nvfp4.safetensors --nvfp4 --scale-optimization joint
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.fi
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.RE
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.TP
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.B Fast INT8 conversion with ConvRot outlier mitigation:
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.RS
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.nf
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ctq -i model.safetensors --int8 --convrot --simple -o model-int8.safetensors
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.fi
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.RE
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.TP
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.B Quantize with Error Correction LoRA extraction:
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.RS
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.nf
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ctq -i model.safetensors --nvfp4 --extract-lora --lora-rank 32 --lora-output model-ec-lora.safetensors
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.fi
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.RE
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.SH SEE ALSO
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.BR hf_to_nvfp4_safetensors (1),
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.BR safetensors_to_nvfp4_gguf (1),
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.BR heretic (1)
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