This fixes up handling of divisions on ARM/Windows, and consistently does calls to helper functions using the windows/msvc names, instead of the libgcc naming.
362 lines
14 KiB
Diff
362 lines
14 KiB
Diff
From ed632cebfe6b046152e3f353c7a70ae4c4efea52 Mon Sep 17 00:00:00 2001
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From: Martin Storsjo <martin@martin.st>
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Date: Fri, 7 Oct 2016 13:28:53 +0000
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Subject: [PATCH 7/9] [ARM] Reapply: Use __rt_div functions for divrem on
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Windows
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Reapplying r283383 after revert in r283442. The additional fix
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is a getting rid of a stray space in a function name, in the
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refactoring part of the commit.
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This avoids falling back to calling out to the GCC rem functions
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(__moddi3, __umoddi3) when targeting Windows.
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The __rt_div functions have flipped the two arguments compared
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to the __aeabi_divmod functions. To match MSVC, we emit a
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check for division by zero before actually calling the library
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function (even if the library function itself also might do
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the same check).
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Not all calls to __rt_div functions for division are currently
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merged with calls to the same function with the same parameters
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for the remainder. This is more wasteful than a div + mls as before,
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but avoids calls to __moddi3.
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Differential Revision: https://reviews.llvm.org/D25332
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Cherry-picked from SVN trunk commit 283550, git mirror commit
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c3339a54ac77.
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---
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lib/Target/ARM/ARMISelLowering.cpp | 66 ++++++++++++++++++++++++++------------
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test/CodeGen/ARM/Windows/dbzchk.ll | 2 +-
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test/CodeGen/ARM/divmod-eabi.ll | 56 +++++++++++++-------------------
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3 files changed, 68 insertions(+), 56 deletions(-)
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diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
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index 3cfcb1e..8db9f54 100644
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--- a/lib/Target/ARM/ARMISelLowering.cpp
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+++ b/lib/Target/ARM/ARMISelLowering.cpp
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@@ -803,19 +803,26 @@ ARMTargetLowering::ARMTargetLowering(const TargetMachine &TM,
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setOperationAction(ISD::UREM, MVT::i32, Expand);
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// Register based DivRem for AEABI (RTABI 4.2)
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if (Subtarget->isTargetAEABI() || Subtarget->isTargetAndroid() ||
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- Subtarget->isTargetGNUAEABI() || Subtarget->isTargetMuslAEABI()) {
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+ Subtarget->isTargetGNUAEABI() || Subtarget->isTargetMuslAEABI() ||
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+ Subtarget->isTargetWindows()) {
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setOperationAction(ISD::SREM, MVT::i64, Custom);
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setOperationAction(ISD::UREM, MVT::i64, Custom);
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HasStandaloneRem = false;
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- setLibcallName(RTLIB::SDIVREM_I8, "__aeabi_idivmod");
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- setLibcallName(RTLIB::SDIVREM_I16, "__aeabi_idivmod");
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- setLibcallName(RTLIB::SDIVREM_I32, "__aeabi_idivmod");
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- setLibcallName(RTLIB::SDIVREM_I64, "__aeabi_ldivmod");
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- setLibcallName(RTLIB::UDIVREM_I8, "__aeabi_uidivmod");
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- setLibcallName(RTLIB::UDIVREM_I16, "__aeabi_uidivmod");
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- setLibcallName(RTLIB::UDIVREM_I32, "__aeabi_uidivmod");
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- setLibcallName(RTLIB::UDIVREM_I64, "__aeabi_uldivmod");
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+ for (const auto &LC :
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+ {RTLIB::SDIVREM_I8, RTLIB::SDIVREM_I16, RTLIB::SDIVREM_I32})
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+ setLibcallName(LC, Subtarget->isTargetWindows() ? "__rt_sdiv"
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+ : "__aeabi_idivmod");
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+ setLibcallName(RTLIB::SDIVREM_I64, Subtarget->isTargetWindows()
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+ ? "__rt_sdiv64"
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+ : "__aeabi_ldivmod");
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+ for (const auto &LC :
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+ {RTLIB::UDIVREM_I8, RTLIB::UDIVREM_I16, RTLIB::UDIVREM_I32})
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+ setLibcallName(LC, Subtarget->isTargetWindows() ? "__rt_udiv"
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+ : "__aeabi_uidivmod");
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+ setLibcallName(RTLIB::UDIVREM_I64, Subtarget->isTargetWindows()
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+ ? "__rt_udiv64"
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+ : "__aeabi_uldivmod");
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setLibcallCallingConv(RTLIB::SDIVREM_I8, CallingConv::ARM_AAPCS);
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setLibcallCallingConv(RTLIB::SDIVREM_I16, CallingConv::ARM_AAPCS);
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@@ -7029,6 +7036,19 @@ SDValue ARMTargetLowering::LowerDIV_Windows(SDValue Op, SelectionDAG &DAG,
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return LowerWindowsDIVLibCall(Op, DAG, Signed, DBZCHK);
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}
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+static SDValue WinDBZCheckDenominator(SelectionDAG &DAG, SDNode *N, SDValue InChain) {
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+ SDLoc DL(N);
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+ SDValue Op = N->getOperand(1);
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+ if (N->getValueType(0) == MVT::i32)
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+ return DAG.getNode(ARMISD::WIN__DBZCHK, DL, MVT::Other, InChain, Op);
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+ SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, Op,
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+ DAG.getConstant(0, DL, MVT::i32));
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+ SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, DL, MVT::i32, Op,
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+ DAG.getConstant(1, DL, MVT::i32));
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+ return DAG.getNode(ARMISD::WIN__DBZCHK, DL, MVT::Other, InChain,
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+ DAG.getNode(ISD::OR, DL, MVT::i32, Lo, Hi));
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+}
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+
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void ARMTargetLowering::ExpandDIV_Windows(
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SDValue Op, SelectionDAG &DAG, bool Signed,
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SmallVectorImpl<SDValue> &Results) const {
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@@ -7039,14 +7059,7 @@ void ARMTargetLowering::ExpandDIV_Windows(
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"unexpected type for custom lowering DIV");
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SDLoc dl(Op);
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- SDValue Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op.getOperand(1),
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- DAG.getConstant(0, dl, MVT::i32));
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- SDValue Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, dl, MVT::i32, Op.getOperand(1),
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- DAG.getConstant(1, dl, MVT::i32));
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- SDValue Or = DAG.getNode(ISD::OR, dl, MVT::i32, Lo, Hi);
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-
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- SDValue DBZCHK =
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- DAG.getNode(ARMISD::WIN__DBZCHK, dl, MVT::Other, DAG.getEntryNode(), Or);
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+ SDValue DBZCHK = WinDBZCheckDenominator(DAG, Op.getNode(), DAG.getEntryNode());
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SDValue Result = LowerWindowsDIVLibCall(Op, DAG, Signed, DBZCHK);
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@@ -12043,7 +12056,7 @@ static RTLIB::Libcall getDivRemLibcall(
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}
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static TargetLowering::ArgListTy getDivRemArgList(
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- const SDNode *N, LLVMContext *Context) {
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+ const SDNode *N, LLVMContext *Context, const ARMSubtarget *Subtarget) {
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assert((N->getOpcode() == ISD::SDIVREM || N->getOpcode() == ISD::UDIVREM ||
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N->getOpcode() == ISD::SREM || N->getOpcode() == ISD::UREM) &&
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"Unhandled Opcode in getDivRemArgList");
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@@ -12060,12 +12073,15 @@ static TargetLowering::ArgListTy getDivRemArgList(
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Entry.isZExt = !isSigned;
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Args.push_back(Entry);
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}
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+ if (Subtarget->isTargetWindows() && Args.size() >= 2)
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+ std::swap(Args[0], Args[1]);
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return Args;
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}
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SDValue ARMTargetLowering::LowerDivRem(SDValue Op, SelectionDAG &DAG) const {
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assert((Subtarget->isTargetAEABI() || Subtarget->isTargetAndroid() ||
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- Subtarget->isTargetGNUAEABI() || Subtarget->isTargetMuslAEABI()) &&
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+ Subtarget->isTargetGNUAEABI() || Subtarget->isTargetMuslAEABI() ||
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+ Subtarget->isTargetWindows()) &&
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"Register-based DivRem lowering only");
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unsigned Opcode = Op->getOpcode();
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assert((Opcode == ISD::SDIVREM || Opcode == ISD::UDIVREM) &&
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@@ -12079,13 +12095,17 @@ SDValue ARMTargetLowering::LowerDivRem(SDValue Op, SelectionDAG &DAG) const {
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SDValue InChain = DAG.getEntryNode();
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TargetLowering::ArgListTy Args = getDivRemArgList(Op.getNode(),
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- DAG.getContext());
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+ DAG.getContext(),
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+ Subtarget);
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SDValue Callee = DAG.getExternalSymbol(getLibcallName(LC),
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getPointerTy(DAG.getDataLayout()));
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Type *RetTy = (Type*)StructType::get(Ty, Ty, nullptr);
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+ if (Subtarget->isTargetWindows())
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+ InChain = WinDBZCheckDenominator(DAG, Op.getNode(), InChain);
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+
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SDLoc dl(Op);
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TargetLowering::CallLoweringInfo CLI(DAG);
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CLI.setDebugLoc(dl).setChain(InChain)
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@@ -12119,11 +12139,15 @@ SDValue ARMTargetLowering::LowerREM(SDNode *N, SelectionDAG &DAG) const {
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RTLIB::Libcall LC = getDivRemLibcall(N, N->getValueType(0).getSimpleVT().
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SimpleTy);
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SDValue InChain = DAG.getEntryNode();
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- TargetLowering::ArgListTy Args = getDivRemArgList(N, DAG.getContext());
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+ TargetLowering::ArgListTy Args = getDivRemArgList(N, DAG.getContext(),
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+ Subtarget);
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bool isSigned = N->getOpcode() == ISD::SREM;
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SDValue Callee = DAG.getExternalSymbol(getLibcallName(LC),
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getPointerTy(DAG.getDataLayout()));
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+ if (Subtarget->isTargetWindows())
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+ InChain = WinDBZCheckDenominator(DAG, N, InChain);
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+
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// Lower call
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CallLoweringInfo CLI(DAG);
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CLI.setChain(InChain)
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diff --git a/test/CodeGen/ARM/Windows/dbzchk.ll b/test/CodeGen/ARM/Windows/dbzchk.ll
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index 599a7cf..c078e09 100644
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--- a/test/CodeGen/ARM/Windows/dbzchk.ll
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+++ b/test/CodeGen/ARM/Windows/dbzchk.ll
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@@ -141,7 +141,7 @@ attributes #0 = { optsize }
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; CHECK-CFG-ASM-NEXT: udf.w #249
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; CHECK-CFG-ASM-LABEL: .LBB2_4:
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; CHECK-CFG-ASM: bl __rt_udiv
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-; CHECK-CFG-ASM: pop.w {{{.*}}, r11, pc}
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+; CHECK-CFG-ASM: pop.w {r11, pc}
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; RUN: llc -O0 -mtriple thumbv7--windows-itanium -verify-machineinstrs -filetype asm -o - %s | FileCheck %s -check-prefix CHECK-WIN__DBZCHK
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diff --git a/test/CodeGen/ARM/divmod-eabi.ll b/test/CodeGen/ARM/divmod-eabi.ll
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index 1e4c8fc..ce5a1df 100644
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--- a/test/CodeGen/ARM/divmod-eabi.ll
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+++ b/test/CodeGen/ARM/divmod-eabi.ll
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@@ -42,15 +42,13 @@ entry:
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; DARWIN-DEFAULT: add [[sum:r[0-9]+]], r0, [[div]]
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; DARWIN-O0: mov [[rem:r[0-9]+]], r0
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; WINDOWS: __rt_sdiv
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-; WINDOWS-DEFAULT: mls [[rem:r[0-9]+]], r0,
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-; WINDOWS-DEFAULT: adds [[sum:r[0-9]+]], [[rem]], r0
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-; WINDOWS-O0: mov [[div:r[0-9]+]], r0
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-; WINDOWS-O0: mls [[rem:r[0-9]+]], [[div]],
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+; WINDOWS: __rt_sdiv
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+; WINDOWS-DEFAULT: add [[sum:r[0-9]+]], r1
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+; WINDOWS-O0: mov [[rem:r[0-9]+]], r1
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%rem8 = srem i32 %conv1, %conv
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; EABI: __aeabi_idivmod
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; DARWIN: __modsi3
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; WINDOWS: __rt_sdiv
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-; WINDOWS: mls [[rem1:r[0-9]+]], r0,
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%add = add nsw i32 %rem, %div
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%add13 = add nsw i32 %add, %rem8
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%conv14 = trunc i32 %add13 to i16
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@@ -60,9 +58,10 @@ entry:
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; DARWIN-O0: add [[sum:r[0-9]+]], [[rem]], [[div]]
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; DARWIN-O0: add [[res:r[0-9]+]], [[sum]], r0
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; DARWIN: sxth r0, [[res]]
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-; WINDOWS-O0: adds [[sum:r[0-9]+]], [[rem]], [[div]]
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-; WINDOWS: add [[rem1]], [[sum]]
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-; WINDOWS: sxth [[res:r[0-9]+]], [[rem1]]
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+; WINDOWS-DEFAULT: adds [[sum1:r[0-9]+]], [[sum]], r1
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+; WINDOWS-O0: adds [[sum:r[0-9]+]], [[rem]],
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+; WINDOWS-O0: add [[sum1:r[0-9]+]], r1
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+; WINDOWS: sxth [[res:r[0-9]+]], [[sum1]]
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ret i16 %conv14
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}
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@@ -84,22 +83,20 @@ entry:
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; WINDOWS: __rt_sdiv
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; WINDOWS: mov [[div:r[0-9]+]], r0
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; WINDOWS: __rt_sdiv
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-; WINDOWS: mls [[rem:r[0-9]+]], r0,
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-; WINDOWS-DEFAULT: add [[div]], [[rem]]
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+; WINDOWS-DEFAULT: add [[div]], r1
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%rem1 = srem i32 %b, %a
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; EABI: __aeabi_idivmod
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; DARWIN: __modsi3
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; WINDOWS: __rt_sdiv
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-; WINDOWS: mls [[rem1:r[0-9]+]], r0,
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%add = add nsw i32 %rem, %div
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%add2 = add nsw i32 %add, %rem1
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; EABI: add r0{{.*}}r1
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; DARWIN-DEFAULT: add r0, [[sum]], r0
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; DARWIN-O0: add [[sum:r[0-9]+]], [[rem]], [[div]]
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; DARWIN-O0: add [[res:r[0-9]+]], [[sum]], r0
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-; WINDOWS-DEFAULT: add [[rem1]], [[div]]
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+; WINDOWS-DEFAULT: adds r0, [[div]], r1
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; WINDOWS-O0: adds [[sum:r[0-9]+]], [[rem]], [[div]]
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-; WINDOWS-O0: add [[rem1]], [[sum]]
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+; WINDOWS-O0: add [[sum]], r1
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ret i32 %add2
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}
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@@ -119,22 +116,20 @@ entry:
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; WINDOWS: __rt_udiv
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; WINDOWS: mov [[div:r[0-9]+]], r0
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; WINDOWS: __rt_udiv
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-; WINDOWS: mls [[rem:r[0-9]+]], r0,
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-; WINDOWS-DEFAULT: add [[div]], [[rem]]
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+; WINDOWS-DEFAULT: add [[div]], r1
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%rem1 = urem i32 %b, %a
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; EABI: __aeabi_uidivmod
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; DARWIN: __umodsi3
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; WINDOWS: __rt_udiv
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-; WINDOWS: mls [[rem1:r[0-9]+]], r0,
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%add = add nuw i32 %rem, %div
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%add2 = add nuw i32 %add, %rem1
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; EABI: add r0{{.*}}r1
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; DARWIN-DEFAULT: add r0, [[sum]], r0
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; DARWIN-O0: add [[sum:r[0-9]+]], [[rem]], [[div]]
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; DARWIN-O0: add [[res:r[0-9]+]], [[sum]], r0
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-; WINDOWS-DEFAULT: add [[rem1]], [[div]]
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-; WINDOWS-O0: adds [[sum:r[0-9]+]], [[rem]], [[div]]
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-; WINDOWS-O0: add [[rem1]], [[sum]]
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+; WINDOWS-DEFAULT: adds [[sum:r[0-9]+]], [[div]], r1
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+; WINDOWS-O0: adds [[sum:r[0-9]+]],
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+; WINDOWS-O0: add [[sum]], r1
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ret i32 %add2
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}
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@@ -154,14 +149,11 @@ entry:
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; DARWIN: mov [[div2:r[0-9]+]], r1
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; DARWIN: __moddi3
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; WINDOWS: __rt_sdiv64
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-; WINDOWS: mov [[div1:r[0-9]+]], r0
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-; WINDOWS: mov [[div2:r[0-9]+]], r1
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-; WINDOWS: __moddi3
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%add = add nsw i64 %rem, %div
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; DARWIN: adds r0{{.*}}[[div1]]
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; DARWIN: adc r1{{.*}}[[div2]]
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-; WINDOWS: adds.w r0, r0, [[div1]]
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-; WINDOWS: adc.w r1, r1, [[div2]]
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+; WINDOWS: adds r0, r0, r2
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+; WINDOWS: adcs r1, r3
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ret i64 %add
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}
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@@ -179,11 +171,10 @@ entry:
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; WINDOWS: __rt_sdiv
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; WINDOWS: mov [[div:r[0-9]+]], r0
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; WINDOWS: __rt_sdiv
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-; WINDOWS: mls [[rem:r[0-9]+]], r0,
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%add = add nsw i16 %rem, %div
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; EABI: add r0, r1
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; DARWIN: add r0{{.*}}[[div1]]
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-; WINDOWS: add [[rem]], [[div]]
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+; WINDOWS: adds r0, r1, [[div]]
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ret i16 %add
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}
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@@ -201,11 +192,10 @@ entry:
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; WINDOWS: __rt_sdiv
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; WINDOWS: mov [[div:r[0-9]+]], r0
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; WINDOWS: __rt_sdiv
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-; WINDOWS: mls [[rem:r[0-9]+]], r0,
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%add = add nsw i32 %rem, %div
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; EABI: add r0{{.*}}r1
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; DARWIN: add r0{{.*}}[[sum]]
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-; WINDOWS: add [[rem]], [[div]]
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+; WINDOWS: adds r0, r1, [[div]]
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ret i32 %add
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}
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@@ -221,7 +211,7 @@ entry:
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; WINDOWS: __rt_sdiv
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ret i32 %rem
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; EABI: mov r0, r1
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-; WINDOWS: mls r0, r0,
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+; WINDOWS: mov r0, r1
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}
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define i32 @g3(i32 %a, i32 %b) {
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@@ -235,16 +225,15 @@ entry:
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; DARWIN: __modsi3
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; DARWIN: mov [[sum:r[0-9]+]], r0
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; WINDOWS: __rt_sdiv
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-; WINDOWS: mls [[rem:r[0-9]+]], r0,
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+; WINDOWS: mov [[rem:r[0-9]+]], r1
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%rem1 = srem i32 %b, %rem
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; EABI: __aeabi_idivmod
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; DARWIN: __modsi3
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; WINDOWS: __rt_sdiv
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-; WINDOWS: mls [[rem1:r[0-9]+]], r0,
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%add = add nsw i32 %rem1, %rem
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; EABI: add r0, r1, [[mod]]
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; DARWIN: add r0{{.*}}[[sum]]
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-; WINDOWS: add [[rem1]], [[rem]]
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+; WINDOWS: adds r0, r1, [[rem]]
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ret i32 %add
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}
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@@ -264,10 +253,9 @@ entry:
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; EABI: __aeabi_idivmod
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; DARWIN: __modsi3
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; WINDOWS: __rt_sdiv
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-; WINDOWS: mls [[rem:r[0-9]+]], r0,
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%add = add nsw i32 %rem, %div
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; EABI: add r0, r1, [[div]]
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; DARWIN: add r0{{.*}}[[sum]]
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-; WINDOWS: add [[rem]], [[div]]
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+; WINDOWS: adds r0, r1, [[div]]
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ret i32 %add
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}
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--
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2.7.4
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