This fixes up handling of divisions on ARM/Windows, and consistently does calls to helper functions using the windows/msvc names, instead of the libgcc naming.
187 lines
6.0 KiB
Diff
187 lines
6.0 KiB
Diff
From 20692f7f7548e98523818db6d83ca66e3ae0dedc Mon Sep 17 00:00:00 2001
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From: Saleem Abdulrasool <compnerd@compnerd.org>
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Date: Mon, 31 Oct 2016 22:12:37 +0000
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Subject: [PATCH 9/9] CodeGen: further loosen -O0 CG for WoA division
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Generate the slowest possible codepath for noopt CodeGen. Even trying to be
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clever with the negated jump can cause out-of-range jumps. Use a wide branch
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instead. Although the code is modelled simplistically, the later optimizations
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would recombine the branching into `cbz` if possible. This re-enables the
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previous optimization as well as hopefully gives us working code in all cases.
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Addresses PR30356!
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Cherry-picked from SVN trunk commit 285649, git mirror commit
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f185e91e2bc8.
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---
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lib/Target/ARM/ARMISelLowering.cpp | 18 ++++++++++++-----
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test/CodeGen/ARM/Windows/dbzchk.ll | 31 ++++++++++++++++--------------
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test/CodeGen/ARM/Windows/division-range.ll | 4 ++--
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test/CodeGen/ARM/Windows/division.ll | 20 +++++++++----------
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4 files changed, 42 insertions(+), 31 deletions(-)
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diff --git a/lib/Target/ARM/ARMISelLowering.cpp b/lib/Target/ARM/ARMISelLowering.cpp
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index f7b09fa..6d4e6d7 100644
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--- a/lib/Target/ARM/ARMISelLowering.cpp
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+++ b/lib/Target/ARM/ARMISelLowering.cpp
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@@ -8214,12 +8214,20 @@ ARMTargetLowering::EmitLowered__dbzchk(MachineInstr &MI,
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ContBB->splice(ContBB->begin(), MBB,
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std::next(MachineBasicBlock::iterator(MI)), MBB->end());
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ContBB->transferSuccessorsAndUpdatePHIs(MBB);
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-
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- BuildMI(*MBB, MI, DL, TII->get(ARM::tCBNZ))
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- .addReg(MI.getOperand(0).getReg())
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- .addMBB(ContBB);
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MBB->addSuccessor(ContBB);
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- BuildMI(*MBB, MI, DL, TII->get(ARM::t__brkdiv0));
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+
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+ MachineBasicBlock *TrapBB = MF->CreateMachineBasicBlock();
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+ BuildMI(TrapBB, DL, TII->get(ARM::t__brkdiv0));
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+ MF->push_back(TrapBB);
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+ MBB->addSuccessor(TrapBB);
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+
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+ AddDefaultPred(BuildMI(*MBB, MI, DL, TII->get(ARM::tCMPi8))
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+ .addReg(MI.getOperand(0).getReg())
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+ .addImm(0));
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+ BuildMI(*MBB, MI, DL, TII->get(ARM::t2Bcc))
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+ .addMBB(TrapBB)
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+ .addImm(ARMCC::EQ)
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+ .addReg(ARM::CPSR);
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MI.eraseFromParent();
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return ContBB;
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diff --git a/test/CodeGen/ARM/Windows/dbzchk.ll b/test/CodeGen/ARM/Windows/dbzchk.ll
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index af23cb2..aea3799 100644
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--- a/test/CodeGen/ARM/Windows/dbzchk.ll
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+++ b/test/CodeGen/ARM/Windows/dbzchk.ll
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@@ -75,7 +75,7 @@ return:
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; CHECK-MOD-DAG: BB#2
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; RUN: llc -mtriple thumbv7--windows-itanium -print-machineinstrs=expand-isel-pseudos -verify-machineinstrs -filetype asm -o /dev/null %s 2>&1 | FileCheck %s -check-prefix CHECK-CFG
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-; RUN: llc -mtriple thumbv7--windows-itanium -print-machineinstrs=expand-isel-pseudos -verify-machineinstrs -filetype asm -o - %s | FileCheck %s -check-prefix CHECK-CFG-ASM
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+; RUN: llc -mtriple thumbv7--windows-itanium -verify-machineinstrs -filetype asm -o - %s | FileCheck %s -check-prefix CHECK-CFG-ASM
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; unsigned c;
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; extern unsigned long g(void);
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@@ -119,21 +119,24 @@ attributes #0 = { optsize }
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; CHECK-CFG-DAG: t2B <BB#3>
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; CHECK-CFG-DAG: BB#2
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-; CHECK-CFG-DAG: tCBNZ %vreg{{[0-9]}}, <BB#4>
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-; CHECK-CFG-DAG: t__brkdiv0
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+; CHECK-CFG-DAG: tCMPi8 %vreg{{[0-9]}}, 0
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+; CHECK-CFG-DAG: t2Bcc <BB#5>
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; CHECK-CFG-DAG: BB#4
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; CHECK-CFG-DAG: BB#3
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; CHECK-CFG-DAG: tBX_RET
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+; CHECK-CFG-DAG: BB#5
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+; CHECK-CFG-DAG: t__brkdiv0
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+
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; CHECK-CFG-ASM-LABEL: h:
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-; CHECK-CFG-ASM: cbnz r{{[0-9]}}, .LBB2_2
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-; CHECK-CFG-ASM: __brkdiv0
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-; CHECK-CFG-ASM-LABEL: .LBB2_2:
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+; CHECK-CFG-ASM: cbz r{{[0-9]}}, .LBB2_4
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; CHECK-CFG-ASM: bl __rt_udiv
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+; CHECK-CFG-ASM-LABEL: .LBB2_4:
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+; CHECK-CFG-ASM: __brkdiv0
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-; RUN: llc -O0 -mtriple thumbv7--windows-itanium -verify-machineinstrs -filetype asm -o - %s | FileCheck %s -check-prefix CHECK-WIN__DBZCHK
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+; RUN: llc -O1 -mtriple thumbv7--windows-itanium -verify-machineinstrs -filetype asm -o - %s | FileCheck %s -check-prefix CHECK-WIN__DBZCHK
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; long k(void);
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; int l(void);
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@@ -172,11 +175,11 @@ return:
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}
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; CHECK-WIN__DBZCHK-LABEL: j:
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-; CHECK-WIN__DBZCHK: cbnz r{{[0-7]}}, .LBB
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-; CHECK-WIN__DBZCHK-NOT: cbnz r8, .LBB
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-; CHECK-WIN__DBZCHK-NOT: cbnz r9, .LBB
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-; CHECK-WIN__DBZCHK-NOT: cbnz r10, .LBB
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-; CHECK-WIN__DBZCHK-NOT: cbnz r11, .LBB
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-; CHECK-WIN__DBZCHK-NOT: cbnz ip, .LBB
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-; CHECK-WIN__DBZCHK-NOT: cbnz lr, .LBB
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+; CHECK-WIN__DBZCHK: cbz r{{[0-7]}}, .LBB
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+; CHECK-WIN__DBZCHK-NOT: cbz r8, .LBB
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+; CHECK-WIN__DBZCHK-NOT: cbz r9, .LBB
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+; CHECK-WIN__DBZCHK-NOT: cbz r10, .LBB
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+; CHECK-WIN__DBZCHK-NOT: cbz r11, .LBB
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+; CHECK-WIN__DBZCHK-NOT: cbz ip, .LBB
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+; CHECK-WIN__DBZCHK-NOT: cbz lr, .LBB
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diff --git a/test/CodeGen/ARM/Windows/division-range.ll b/test/CodeGen/ARM/Windows/division-range.ll
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index 9b1920c..b14339e 100644
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--- a/test/CodeGen/ARM/Windows/division-range.ll
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+++ b/test/CodeGen/ARM/Windows/division-range.ll
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@@ -9,7 +9,7 @@ entry:
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ret i32 %div
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}
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-; CHECK: cbnz r1, #0
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-; CHECK: __brkdiv0
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+; CHECK: cmp r1, #0
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+; CHECK: beq #
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; CHECK: bl
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diff --git a/test/CodeGen/ARM/Windows/division.ll b/test/CodeGen/ARM/Windows/division.ll
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index b149cb0..10f86b0 100644
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--- a/test/CodeGen/ARM/Windows/division.ll
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+++ b/test/CodeGen/ARM/Windows/division.ll
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@@ -8,9 +8,9 @@ entry:
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}
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; CHECK-LABEL: sdiv32:
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-; CHECK: cbnz r0
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-; CHECK: __brkdiv0
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+; CHECK: cbz r0
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; CHECK: bl __rt_sdiv
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+; CHECK: __brkdiv0
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define arm_aapcs_vfpcc i32 @udiv32(i32 %divisor, i32 %divident) {
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entry:
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@@ -19,9 +19,9 @@ entry:
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}
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; CHECK-LABEL: udiv32:
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-; CHECK: cbnz r0
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-; CHECK: __brkdiv0
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+; CHECK: cbz r0
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; CHECK: bl __rt_udiv
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+; CHECK: __brkdiv0
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define arm_aapcs_vfpcc i64 @sdiv64(i64 %divisor, i64 %divident) {
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entry:
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@@ -30,10 +30,10 @@ entry:
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}
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; CHECK-LABEL: sdiv64:
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-; CHECK: orr.w r4, r0, r1
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-; CHECK-NEXT: cbnz r4
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-; CHECK: __brkdiv0
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+; CHECK: orrs.w r4, r0, r1
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+; CHECK-NEXT: beq
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; CHECK: bl __rt_sdiv64
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+; CHECK: __brkdiv0
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define arm_aapcs_vfpcc i64 @udiv64(i64 %divisor, i64 %divident) {
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entry:
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@@ -42,8 +42,8 @@ entry:
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}
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; CHECK-LABEL: udiv64:
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-; CHECK: orr.w r4, r0, r1
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-; CHECK-NEXT: cbnz r4
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-; CHECK: __brkdiv0
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+; CHECK: orrs.w r4, r0, r1
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+; CHECK-NEXT: beq
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; CHECK: bl __rt_udiv64
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+; CHECK: __brkdiv0
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--
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2.7.4
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